The consistent improvement in manufacturing technology for integrated circuits has led to the continuous decline in the minimum size of integrated circuit chips. Due to the trend of decreasing chip sizes, however, during the physical design it is more and more necessary to take into consideration the influence that manufacturability exerts on the yield and reliability of the integrated circuit chip. In light of the above, besides the testing and validation phases after manufacturing the physical integrated circuit chip, the physical design validation of integrated circuits is also an important step in the circuit design process.
In the physical design validation process for all kinds of integrated circuits, the physical design validation process is to identify whether the design of a certain integrated circuit satisfies all the process rules. Geometric design rules ensure said circuit is manufactured correctly by inspecting the relative position and syntax of a circuit's final layout. The testing of the functional correctness is to be completed with the assistance of verifier and simulator that model the operation and behavior of the circuit. An electrical rule check or design rule check is used for processing the layout syntax and analyzing the complicated behavior. Electrical rules involve related attribute specifications of a certain circuit, which are determined by geometrical and connection relationships.
Among various software and hardware methods for the physical design validation of integrated circuits, layout versus schematic (LVS) software is used to identify whether the original circuit netlist of an integrated circuit is in conformity with the graphical data of said circuit. Said LVS will first create a layout circuit netlist according to the graphical data of said circuit, and then make a comparison between said original circuit netlist and said LVS. If it turns out to be conflicting, the circuit designer can correct the layout and the routing according to the comparison results, creating new graphical data, and then compare said original circuit netlist and the new graphical data once again.
However, whether the circuit designer creates the layout of said integrated circuit according to the original circuit netlist of an integrated circuit, or corrects the layout of said integrated circuit according to the comparison results provided by the layout versus schematic software, two circuits are likely to be connected from two different signal networks in the process of making the layout in both situations, leading to a mistake called a “short circuit”. A short circuit often occurs in the power supply network and the grounding system, but it also includes incorrect connections of various signal networks, not limited to short circuits of the power supply network and the grounding system.
Due to the fact that short circuits of integrated circuit take place within the layout of the integrated circuit, it is difficult to locate the position of the short circuit manually. As a result, in order to solve the short circuit problem in the integrated circuit, software has been created for physical design validation to locate the position of short circuits in integrated circuits. FIG. 1 is a flowchart for locating the position of short circuits in an existing integrated circuit. In Step 102, labels of an integrated circuit are entered according to an edit file set up by the user or a data file of the circuit layout, and then go to Step 104. In Step 104, according to the labels in said integrated circuit, the positions of possible short circuits in said integrated circuit are located.
FIG. 2 is a partial diagram of the short circuit in an integrated circuit. As is shown, said integrated circuit 200 includes components 202, 204 and 206, with each of these components 202, 204, and 206 including four input and output terminals. Said components 202, 204 and 206 are connected by a power supply network and a grounding system, while the metal wire 250 across said power supply network and said grounding system causes a short circuit.
Let's assume the method in FIG. 1 of searching for the position of the short circuit in an existing integrated circuit was applied to the integrated circuit 200 in FIG. 2. In Step 102, the user enters a power supply network VDD at endpoint A, and enters a grounding system VSS at endpoint B. In Step 104, according to the labels VDD and VSS in said integrated circuit, the position of a possible short circuit in said integrated circuit 200 could be located.
However, there exist many drawbacks in the current methods of searching for the position of a short circuit in integrated circuits. First, the users might supply labels of an incorrect integrated circuit, which leads to the fact that said searching method is unable to locate the correct position of a short circuit. Second, if the labels of an incorrect integrated circuit are not supplied, the users may provide too few labels of an integrated circuit, which leads to the fact that it might cost a large amount of time for the current method to search for said position of a short circuit in the integrated circuit, or it might even be unable to locate the position of said short circuit at all.
As a result, what the circuit industry needs is an effective method and apparatus, which could reduce dramatically the time needed to search for short circuits in the integrated circuit, and could ensure a more effective flow of the entire integrated circuit design.